TITLE: Principal Hardware Applications Engineer (Hybrid/Remote)
TYPE: Remote/Hybrid
LOCATION: Santa Clara CA
ROLE: Fulltime / Direct Hire
OVERVIEW:
· In addition to salary, there is equity and annual bonuses as well.
· Will relocate someone closer if needed, but they should already be fairly close as there are lots of techies in this area.
· You can work from home and come into the office rarely/ as needed.
REQUIRED:
· Senior/Partner level Personality, Presentation and Communication Intangible skills
· Networking + ethernet background (this needs to be the core focus of their last job and recent career).
· Expertise in High Speed Ethernet Serdes interfaces : NRZ, PAM-4 100G.
· Expertise in Ethernet Physical layer (Layer 1) - Serdes, MAC, PCS including debugging L1 issues for Interop.
· Strong background in Signal Integrity, Power Integrity, Electromagnetics, Thermal, Multi-lane cross talk analysis and RF applications related to IC Package and PCB Design are required.
· Experience in using tools: HyperLynx, Ansoft SIWave and HFSS, ADS, Sigrity, PowerSI and PowerDC, Cadence Allegro, and Polar stack up
· Able to performance Schematics & Layout reviews effectively
· At least one Scripting Languages : Python / Perl / Unix shell
NICE TO HAVE:
· MATLAB
· Python
· Ability to handle Equipment: Servers (Windows / Linux), Scopes, Traffic generators (Ixia/Spirent/Xena), environmental chambers, Thermal Heads, Keysight VNA/TDR
· Ability to program High speed / optics modules and link up with various modules: LR, SR, ZR, ZR4, AECs etc
JOB DESCRIPTION:
· The hardware application engineering position focuses on resolving customer issues on their HW/platform, customer design enablement, bring-up and manufacture production.
· You should have strong working knowledge of the major computer industry standards such as PCIe Express, Ethernet and miscellaneous interface.
RESPONSIBILITIES:
· Debug L1 ethernet issues related to Serdes and MAC/PHY (analyze Signal Strength, Serdes Eye, Review & Tune SI parameters etc)
· Debug other interfaces on board such as PCIE, i2C, MDIO etc
· Perform Schematics and Layout reviews of the customer design / platform and provide feedback
· Interact with HW designers (board and ASIC) and write Hardware Design guidelines, Application Notes and publish Technical Bulletins
· Interface with board designers, ASIC /Serdes controller designers, program management, board vendors and component vendors to fully comprehend the board design parameters
· Generate PCB stack up recommendations that comprehend the full capabilities of industry available board fabrication materials and technologies
· Communicate effectively with customers considering both strategic and tactical aspects of the solution & work with internal cross-functional teams to deliver optimal solutions
ESSENTIALS:
· Bachelor’s degree in Computer Science, Electrical Engineering or related fields and 10-15 years of related professional experience Or Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 5-10 years of experience.
· Must possess excellent written and verbal communication skills.
· Must be able to present and clearly articulate solutions to customers.
· Previous experience of working as an Application Engineer or any equivalent customer interacting role (i.e. ability to handle customers) is a must.
Job Type: Full-time
Pay: $137,000.00 - $206,000.00 per year
Schedule:
- 8 hour shift
- Monday to Friday
Education:
Experience:
- Networking: 6 years (Required)
- Ethernet: 6 years (Required)
- SERDES: 6 years (Required)
- SIGNAL INTEGRITY: 6 years (Required)
- POWER INTEGRITY: 6 years (Required)
- ELECTROMAGNETICS: 6 years (Required)
- RF: 6 years (Preferred)
- PCB: 6 years (Preferred)
Ability to Commute:
- Santa Clara, CA 95054 (Required)
Ability to Relocate:
- Santa Clara, CA 95054: Relocate with an employer provided relocation package (Required)
Willingness to travel:
Work Location: Hybrid remote in Santa Clara, CA 95054