Cache Coherency Architect (SoC/NoC)
- Job Title: Cache Coherency Architect (SoC/NoC)
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Job Location: Campbell, CA
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Salary: $175,000- 235,000 + Bonus + RSU's
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Requirements: SoC/ASIC, Cache Coherency, interconnect, integration, NoC, system IP, Verification, memory hierarchy, design tools
We are a publicly traded company who is a leading provider of system IP. We consisting of network-on-chip (NoC) interconnect IP and IP deployment technology to accelerate system-on-chip (SoC) semiconductor development and integration for a wide range of electronic products.
Key Responsibilities:
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You will be an important contributor, defining and optimizing cache coherency solutions within our advanced IP portfolio. Your primary focus will be on developing cutting-edge cache coherent interconnect IP and ensuring seamless integration with other NoC interconnects, and system IP to support efficient and coherent communication between multiple processor and accelerator cores and functional units.
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You will collaborate closely with hardware designers, verification engineers, software developers, and other stakeholders to create high-performance, power-efficient, and reliable NoC IP solutions.
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Evaluate existing, industry standard, cache coherency protocols, maintain and improve our proprietary coherency protocol which is used within our highly configurable NoC IP
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Develop comprehensive and scalable cache coherency architectures that align with the overall System-on-a-Chip (SoC) design
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Collaborate with SoC design teams to ensure seamless integration of cache coherency into the SoC architecture
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Help to optimize Cache Coherency Architecture and uArchitecture within the NoC to minimize latency and improve BW
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Support the verification team to develop verification strategies to ensure the correctness and robustness of the cache coherency protocols and the implementation within our NoC IP
Qualifications:
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Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field.
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Proven experience as a Cache Coherency Architect, Design Engineer, or similar role with a focus on NoC IP development.
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In-depth knowledge of SoC and NoC architecture, cache coherency protocols, and memory hierarchy.
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Strong understanding of cache hierarchies and their interaction with NoC interconnects.
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Experience in cache coherency verification and validation techniques.
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Familiarity with hardware description languages (HDLs) and SoC design tools.
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Familiarity with hardware description languages (HDLs) and design tools used in NoC IP development or prior experience in designing coherent systems is highly advantageous.
Benefits
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Competitive salary
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RSU's
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Full Benefits
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401k
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PTO
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Great Place to Work
Applicants must be authorized to work in the U.S.
CyberCoders is proud to be an Equal Opportunity Employer
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, age, sexual orientation, gender identity or expression, national origin, ancestry, citizenship, genetic information, registered domestic partner status, marital status, status as a crime victim, disability, protected veteran status, or any other characteristic protected by law. CyberCoders will consider qualified applicants with criminal histories in a manner consistent with the requirements of applicable law. CyberCoders is committed to working with and providing reasonable accommodation to individuals with physical and mental disabilities. If you need special assistance or an accommodation while seeking employment, please contact a member of our Human Resources team to make arrangements.